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CWE-1233:Security-Sensitive Hardware Controls with Missing Lock Bit Protection
Weakness ID:1233
Version:v4.17
Weakness Name:Security-Sensitive Hardware Controls with Missing Lock Bit Protection
Vulnerability Mapping:Allowed
Abstraction:Base
Structure:Simple
Status:Stable
Likelihood of Exploit:
DetailsContent HistoryObserved CVE ExamplesReports
▼Description

The product uses a register lock bit protection mechanism, but it does not ensure that the lock bit prevents modification of system registers or controls that perform changes to important hardware system configuration.

▼Extended Description

Integrated circuits and hardware intellectual properties (IPs) might provide device configuration controls that need to be programmed after device power reset by a trusted firmware or software module, commonly set by BIOS/bootloader. After reset, there can be an expectation that the controls cannot be used to perform any further modification. This behavior is commonly implemented using a trusted lock bit, which can be set to disable writes to a protected set of registers or address regions. The lock protection is intended to prevent modification of certain system configuration (e.g., memory/memory protection unit configuration).

However, if the lock bit does not effectively write-protect all system registers or controls that could modify the protected system configuration, then an adversary may be able to use software to access the registers/controls and modify the protected hardware configuration.

▼Alternate Terms
▼Relationships
Relevant to the view"Research Concepts - (1000)"
NatureMappingTypeIDName
ChildOfDiscouragedP284Improper Access Control
ChildOfAllowed-with-ReviewC667Improper Locking
Nature: ChildOf
Mapping: Discouraged
Type: Pillar
ID: 284
Name: Improper Access Control
Nature: ChildOf
Mapping: Allowed-with-Review
Type: Class
ID: 667
Name: Improper Locking
▼Memberships
NatureMappingTypeIDName
MemberOfProhibitedC1199General Circuit and Logic Design Concerns
MemberOfProhibitedV1343Weaknesses in the 2021 CWE Most Important Hardware Weaknesses List
MemberOfProhibitedC1372ICS Supply Chain: OT Counterfeit and Malicious Corruption
MemberOfProhibitedC1396Comprehensive Categorization: Access Control
Nature: MemberOf
Mapping: Prohibited
Type:Category
ID: 1199
Name: General Circuit and Logic Design Concerns
Nature: MemberOf
Mapping: Prohibited
Type:View
ID: 1343
Name: Weaknesses in the 2021 CWE Most Important Hardware Weaknesses List
Nature: MemberOf
Mapping: Prohibited
Type:Category
ID: 1372
Name: ICS Supply Chain: OT Counterfeit and Malicious Corruption
Nature: MemberOf
Mapping: Prohibited
Type:Category
ID: 1396
Name: Comprehensive Categorization: Access Control
▼Tags
NatureMappingTypeIDName
MemberOfProhibitedBSBOSS-294Not Language-Specific Weaknesses
MemberOfProhibitedBSBOSS-298Not OS-Specific(os class) Weaknesses
MemberOfProhibitedBSBOSS-301Not Architecture-Specific (architecture class) Weaknesses
MemberOfProhibitedBSBOSS-307Not Technology-Specific (technology class) Weaknesses
MemberOfProhibitedBSBOSS-331Modify Memory (impact)
Nature: MemberOf
Mapping: Prohibited
Type:BOSSView
ID: BOSS-294
Name: Not Language-Specific Weaknesses
Nature: MemberOf
Mapping: Prohibited
Type:BOSSView
ID: BOSS-298
Name: Not OS-Specific(os class) Weaknesses
Nature: MemberOf
Mapping: Prohibited
Type:BOSSView
ID: BOSS-301
Name: Not Architecture-Specific (architecture class) Weaknesses
Nature: MemberOf
Mapping: Prohibited
Type:BOSSView
ID: BOSS-307
Name: Not Technology-Specific (technology class) Weaknesses
Nature: MemberOf
Mapping: Prohibited
Type:BOSSView
ID: BOSS-331
Name: Modify Memory (impact)
▼Relevant To View
Relevant to the view"Hardware Design - (1194)"
NatureMappingTypeIDName
MemberOfProhibitedC1199General Circuit and Logic Design Concerns
Nature: MemberOf
Mapping: Prohibited
Type: Category
ID: 1199
Name: General Circuit and Logic Design Concerns
Relevant to the view"SEI ETF Categories of Security Vulnerabilities in ICS - (1358)"
NatureMappingTypeIDName
MemberOfProhibitedC1372ICS Supply Chain: OT Counterfeit and Malicious Corruption
Nature: MemberOf
Mapping: Prohibited
Type: Category
ID: 1372
Name: ICS Supply Chain: OT Counterfeit and Malicious Corruption
▼Background Detail

▼Common Consequences
ScopeLikelihoodImpactNote
Access ControlN/AModify Memory

System Configuration protected by the lock bit can be modified even when the lock is set.

Scope: Access Control
Likelihood: N/A
Impact: Modify Memory
Note:

System Configuration protected by the lock bit can be modified even when the lock is set.

▼Potential Mitigations
Phase:Architecture and Design, Implementation, Testing
Mitigation ID:
Strategy:
Effectiveness:
Description:
  • Security lock bit protections must be reviewed for design inconsistency and common weaknesses.
  • Security lock programming flow and lock properties must be tested in pre-silicon and post-silicon testing.
Note:

▼Modes Of Introduction
Phase: Architecture and Design
Note:

Such issues could be introduced during hardware architecture and design and identified later during Testing or System Configuration phases.

Phase: Implementation
Note:

Such issues could be introduced during implementation and identified later during Testing or System Configuration phases.

▼Applicable Platforms
Languages
Class: Not Language-Specific(Undetermined Prevalence)
Technology
Class: Not Technology-Specific(Undetermined Prevalence)
Operating System
Class: Not OS-Specific(Undetermined Prevalence)
Architecture
Class: Not Architecture-Specific(Undetermined Prevalence)
▼Demonstrative Examples
Example 1

Consider the example design below for a digital thermal sensor that detects overheating of the silicon and triggers system shutdown. The system critical temperature limit (CRITICAL_TEMP_LIMIT) and thermal sensor calibration (TEMP_SENSOR_CALIB) data have to be programmed by the firmware.

Language: ( code)
N/A

Language: Other(Bad code)
| Register | Field description | | --- | --- | | CRITICAL_TEMP_LIMIT | [31:8] Reserved field; Read only; Default 0 [7:0] Critical temp 0-255 Centigrade; Read-write-lock; Default 125 | | TEMP_SENSOR_CALIB | [31:0] Thermal sensor calibration data. A slope value used to map sensor reading to a degree Centigrade. Read-write; Default 25 | | TEMP_SENSOR_LOCK | [31:1] Reserved field; Read only; Default 0 [0] Lock bit, locks CRITICAL_TEMP_LIMIT register; Write-1-once; Default 0 | | TEMP_HW_SHUTDOWN | [31:2] Reserved field; Read only; Default 0 [1] Enable hardware shutdown on a critical temperature detection; Read-write; Default 0 | | CURRENT_TEMP | [31:8] Reserved field; Read only; Default 0 [7:0] Current Temp 0-255 Centigrade; Read-only; Default 0 |

Language: ( code)
N/A

In this example note that only the CRITICAL_TEMP_LIMIT register is protected by the TEMP_SENSOR_LOCK bit, while the security design intent is to protect any modification of the critical temperature detection and response.

The response of the system, if the system heats to a critical temperature, is controlled by TEMP_HW_SHUTDOWN bit [1], which is not lockable. Also, the TEMP_SENSOR_CALIB register is not protected by the lock bit.

By modifying the temperature sensor calibration, the conversion of the sensor data to a degree centigrade can be changed, such that the current temperature will never be detected to exceed critical temperature value programmed by the protected lock.

Similarly, by modifying the TEMP_HW_SHUTDOWN.Enable bit, the system response detection of the current temperature exceeding critical temperature can be disabled.

Language: Other(Good code)
Change TEMP_HW_SHUTDOWN and TEMP_SENSOR_CALIB controls to be locked by TEMP_SENSOR_LOCK. | | | | TEMP_SENSOR_CALIB | [31:0] Thermal sensor calibration data. A slope value used to map sensor reading to a degree Centigrade. Read-write-Lock; Default 25; Locked by TEMP_SENSOR_LOCK bit[0] | | TEMP_HW_SHUTDOWN | [31:2] Reserved field; Read only; Default 0 [1] Enable hardware shutdown on critical temperature detection; Read-write-Lock; Default 0; Locked by TEMP_SENSOR_LOCK bit[0] |

▼Observed Examples
ReferenceDescription
CVE-2018-9085
Certain servers leave a write protection lock bit unset after boot, potentially allowing modification of parts of flash memory.
CVE-2014-8273
Chain: chipset has a race condition (CWE-362) between when an interrupt handler detects an attempt to write-enable the BIOS (in violation of the lock bit), and when the handler resets the write-enable bit back to 0, allowing attackers to issue BIOS writes during the timing window [REF-1237].
Reference: CVE-2018-9085
Description:
Certain servers leave a write protection lock bit unset after boot, potentially allowing modification of parts of flash memory.
Reference: CVE-2014-8273
Description:
Chain: chipset has a race condition (CWE-362) between when an interrupt handler detects an attempt to write-enable the BIOS (in violation of the lock bit), and when the handler resets the write-enable bit back to 0, allowing attackers to issue BIOS writes during the timing window [REF-1237].
▼Affected Resources
    ▼Functional Areas
      ▼Weakness Ordinalities
      OrdinalityDescription
      Primary
      N/A
      Ordinality: Primary
      Description:
      N/A
      ▼Detection Methods
      Manual Analysis
      Detection Method ID:
      Description:

      Set the lock bit. Attempt to modify the information protected by the lock bit. If the information is changed, implement a design fix. Retest. Also, attempt to indirectly clear the lock bit or bypass it.

      Effectiveness:High
      Note:

      N/A

      ▼Vulnerability Mapping Notes
      Usage:Allowed
      Reason:Acceptable-Use
      Rationale:

      This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.

      Comments:

      Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.

      Suggestions:
      ▼Notes
      ▼Taxonomy Mappings
      Taxonomy NameEntry IDFitEntry Name
      ▼Related Attack Patterns
      IDName
      CAPEC-176
      Configuration/Environment Manipulation
      CAPEC-680
      Exploitation of Improperly Controlled Registers
      ID: CAPEC-176
      Name: Configuration/Environment Manipulation
      ID: CAPEC-680
      Name: Exploitation of Improperly Controlled Registers
      ▼References
      Reference ID: REF-1237
      Title: Intel BIOS locking mechanism contains race condition that enables write protection bypass
      Author: CERT Coordination Center
      Section:
      Publication:
      Publisher:
      Edition:
      URL:https://www.kb.cert.org/vuls/id/766164/
      URL Date:
      Day:05
      Month:01
      Year:2015
      Details not found