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CWE-1254:Incorrect Comparison Logic Granularity
Weakness ID:1254
Version:v4.17
Weakness Name:Incorrect Comparison Logic Granularity
Vulnerability Mapping:Allowed
Abstraction:Base
Structure:Simple
Status:Draft
Likelihood of Exploit:
DetailsContent HistoryObserved CVE ExamplesReports
▼Description

The product's comparison logic is performed over a series of steps rather than across the entire string in one operation. If there is a comparison logic failure on one of these steps, the operation may be vulnerable to a timing attack that can result in the interception of the process for nefarious purposes.

▼Extended Description

Comparison logic is used to compare a variety of objects including passwords, Message Authentication Codes (MACs), and responses to verification challenges. When comparison logic is implemented at a finer granularity (e.g., byte-by-byte comparison) and breaks in the case of a comparison failure, an attacker can exploit this implementation to identify when exactly the failure occurred. With multiple attempts, the attacker may be able to guesses the correct password/response to challenge and elevate their privileges.

▼Alternate Terms
▼Relationships
Relevant to the view"Research Concepts - (1000)"
NatureMappingTypeIDName
ChildOfAllowedB208Observable Timing Discrepancy
ChildOfDiscouragedP697Incorrect Comparison
ParentOfAllowedB1261Improper Handling of Single Event Upsets
Nature: ChildOf
Mapping: Allowed
Type: Base
ID: 208
Name: Observable Timing Discrepancy
Nature: ChildOf
Mapping: Discouraged
Type: Pillar
ID: 697
Name: Incorrect Comparison
Nature: ParentOf
Mapping: Allowed
Type: Base
ID: 1261
Name: Improper Handling of Single Event Upsets
▼Memberships
NatureMappingTypeIDName
MemberOfProhibitedC1199General Circuit and Logic Design Concerns
MemberOfProhibitedC1417Comprehensive Categorization: Sensitive Information Exposure
Nature: MemberOf
Mapping: Prohibited
Type:Category
ID: 1199
Name: General Circuit and Logic Design Concerns
Nature: MemberOf
Mapping: Prohibited
Type:Category
ID: 1417
Name: Comprehensive Categorization: Sensitive Information Exposure
▼Tags
NatureMappingTypeIDName
MemberOfProhibitedBSBOSS-294Not Language-Specific Weaknesses
MemberOfProhibitedBSBOSS-298Not OS-Specific(os class) Weaknesses
MemberOfProhibitedBSBOSS-301Not Architecture-Specific (architecture class) Weaknesses
MemberOfProhibitedBSBOSS-307Not Technology-Specific (technology class) Weaknesses
MemberOfProhibitedBSBOSS-316Bypass Protection Mechanism (impact)
Nature: MemberOf
Mapping: Prohibited
Type:BOSSView
ID: BOSS-294
Name: Not Language-Specific Weaknesses
Nature: MemberOf
Mapping: Prohibited
Type:BOSSView
ID: BOSS-298
Name: Not OS-Specific(os class) Weaknesses
Nature: MemberOf
Mapping: Prohibited
Type:BOSSView
ID: BOSS-301
Name: Not Architecture-Specific (architecture class) Weaknesses
Nature: MemberOf
Mapping: Prohibited
Type:BOSSView
ID: BOSS-307
Name: Not Technology-Specific (technology class) Weaknesses
Nature: MemberOf
Mapping: Prohibited
Type:BOSSView
ID: BOSS-316
Name: Bypass Protection Mechanism (impact)
▼Relevant To View
Relevant to the view"Hardware Design - (1194)"
NatureMappingTypeIDName
MemberOfProhibitedC1199General Circuit and Logic Design Concerns
Nature: MemberOf
Mapping: Prohibited
Type: Category
ID: 1199
Name: General Circuit and Logic Design Concerns
▼Background Detail

▼Common Consequences
ScopeLikelihoodImpactNote
ConfidentialityAuthorizationN/ABypass Protection Mechanism
N/A
Scope: Confidentiality, Authorization
Likelihood: N/A
Impact: Bypass Protection Mechanism
Note:
N/A
▼Potential Mitigations
Phase:Implementation
Mitigation ID:
Strategy:
Effectiveness:
Description:

The hardware designer should ensure that comparison logic is implemented so as to compare in one operation instead in smaller chunks.

Note:

▼Modes Of Introduction
Phase: Architecture and Design
Note:

N/A

Phase: Implementation
Note:

N/A

▼Applicable Platforms
Languages
Class: Not Language-Specific(Undetermined Prevalence)
Technology
Class: Not Technology-Specific(Undetermined Prevalence)
Operating System
Class: Not OS-Specific(Undetermined Prevalence)
Architecture
Class: Not Architecture-Specific(Undetermined Prevalence)
▼Demonstrative Examples
▼Observed Examples
ReferenceDescription
CVE-2019-10482
Smartphone OS uses comparison functions that are not in constant time, allowing side channels
CVE-2019-10071
Java-oriented framework compares HMAC signatures using String.equals() instead of a constant-time algorithm, causing timing discrepancies
CVE-2014-0984
Password-checking function in router terminates validation of a password entry when it encounters the first incorrect character, which allows remote attackers to obtain passwords via a brute-force attack that relies on timing differences in responses to incorrect password guesses, aka a timing side-channel attack.
Reference: CVE-2019-10482
Description:
Smartphone OS uses comparison functions that are not in constant time, allowing side channels
Reference: CVE-2019-10071
Description:
Java-oriented framework compares HMAC signatures using String.equals() instead of a constant-time algorithm, causing timing discrepancies
Reference: CVE-2014-0984
Description:
Password-checking function in router terminates validation of a password entry when it encounters the first incorrect character, which allows remote attackers to obtain passwords via a brute-force attack that relies on timing differences in responses to incorrect password guesses, aka a timing side-channel attack.
▼Affected Resources
    ▼Functional Areas
      ▼Weakness Ordinalities
      OrdinalityDescription
      ▼Detection Methods
      ▼Vulnerability Mapping Notes
      Usage:Allowed
      Reason:Acceptable-Use
      Rationale:

      This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.

      Comments:

      Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.

      Suggestions:
      ▼Notes
      Maintenance

      CWE 4.16 removed a demonstrative example for a hardware module because it was inaccurate and unable to be adapted. The CWE team is developing an alternative.

      N/A

      ▼Taxonomy Mappings
      Taxonomy NameEntry IDFitEntry Name
      ▼Related Attack Patterns
      IDName
      CAPEC-26
      Leveraging Race Conditions
      ID: CAPEC-26
      Name: Leveraging Race Conditions
      ▼References
      Reference ID: REF-1079
      Title: SCA4n00bz - Timing-based Sidechannel Attacks for Hardware N00bz workshop
      Author: Joe Fitzpatrick
      Section:
      Publication:
      Publisher:
      Edition:
      URL:https://github.com/securelyfitz/SCA4n00bz
      URL Date:
      Day:N/A
      Month:N/A
      Year:N/A
      Details not found