Due to a code bug in Secure_TSC, SEV firmware may allow an attacker with high privileges to cause a guest to observe an incorrect TSC when Secure TSC is enabled potentially resulting in a loss of guest integrity. Â
| Date Added | Due Date | Vulnerability Name | Required Action |
|---|---|---|---|
| N/A |
| Type | Version | Base score | Base severity | Vector |
|---|---|---|---|---|
| Primary | 3.1 | 4.9 | MEDIUM | CVSS:3.1/AV:N/AC:L/PR:H/UI:N/S:U/C:N/I:H/A:N |
| Secondary | 3.1 | 4.9 | MEDIUM | CVSS:3.1/AV:N/AC:L/PR:H/UI:N/S:U/C:N/I:H/A:N |
| Hyperlink | Source | Resource |
|---|---|---|
| https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-3007 | psirt@amd.com | Broken Link |
| https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-3007 | af854a3a-2127-422b-91ae-364da2661108 | Broken Link |